Binary AMD Circuits from Secure Multiparty Computation

An AMD circuit over a nite eld F is a randomized arithmetic circuit that o ers the best possible protection against additive attacks. That is, the e ect of every additive attack that may blindly add a (possibly di erent) element of F to every internal wire of the circuit can be simulated by an ideal attack that applies only to the inputs and outputs. Genkin et al. (STOC 2014, Crypto 2015) introduced AMD circuits as a means for protecting MPC protocols against active attacks, and showed that every arithmetic circuit C over F can be transformed into an equivalent AMD circuit of size O(|C|) with O(1/|F|) simulation error. However, for the case of the binary eld F = F2, their constructions relied on a tamper-proof output decoder and could only realize a weaker notion of security. We obtain the rst constructions of fully secure binary AMD circuits. Given a boolean circuit C and a statistical security parameter σ, we construct an equivalent binary AMD circuit C′ of size |C|·polylog(|C|, σ) (ignoring lower order additive terms) with 2−σ simulation error. That is, the e ect of toggling an arbitrary subset of wires can be simulated by toggling only input and output wires. Our construction combines in a general way two types of simple honestmajority MPC protocols: protocols that only o er security against passive adversaries, and protocols that only o er correctness against active adversaries. As a corollary, we get a conceptually new technique for constructing active-secure two-party protocols in the OT-hybrid model, and reduce the open question of obtaining such protocols with constant computational overhead to a similar question in these simpler MPC models.